Sciweavers

418 search results - page 33 / 84
» Fast Integrated Tools for Circuit Design with FPGAs
Sort
View
ISCAS
2007
IEEE
179views Hardware» more  ISCAS 2007»
15 years 4 months ago
Analysis for Signal and Power Integrity Using the Multilayered Finite Difference Method
— We present a method for fast analysis of signal and power integrity based on a recently developed multilayered finite difference method (M-FDM). In order to accurately model m...
Ege Engin, Krishna Bharath, Madhavan Swaminathan
ASAP
2008
IEEE
167views Hardware» more  ASAP 2008»
15 years 4 months ago
Extending the SIMPPL SoC architectural framework to support application-specific architectures on multi-FPGA platforms
Process technology has reduced in size such that it is possible to implement complete applicationspecific architectures as Systems-on-Chip (SoCs) using both Application-Specific I...
David Dickin, Lesley Shannon
GLVLSI
2007
IEEE
115views VLSI» more  GLVLSI 2007»
15 years 4 months ago
Novel architectures for efficient (m, n) parallel counters
Parallel counters are key elements in many arithmetic circuits, especially fast multipliers. In this paper, novel architectures and designs for high speed, low power (3, 2), (7, 3...
Sreehari Veeramachaneni, Lingamneni Avinash, Kirth...
FPGA
1995
ACM
142views FPGA» more  FPGA 1995»
15 years 1 months ago
The Design of RPM: An FPGA-based Multiprocessor Emulator
Recent advances in Field-Programmable Gate Arrays (FPGA) and programmable interconnects have made it possible to build efficient hardware emulation engines. In addition, improveme...
Koray Öner, Luiz André Barroso, Sasan ...
ISSS
1995
IEEE
98views Hardware» more  ISSS 1995»
15 years 1 months ago
On the use of VHDL-based behavioral synthesis for telecom ASIC design
higher levels of abstraction, due to the still increasing design complexities that can be expected in the near future. Behavioral synthesis can play a key role in this prospect, as...
Mark Genoe, Paul Vanoostende, Geert van Wauwe