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ISPD
2005
ACM
116views Hardware» more  ISPD 2005»
15 years 3 months ago
A fast algorithm for power grid design
This paper presents an efficient heuristic algorithm to design a power distribution network of a chip by employing a successive partitioning and grid refinement scheme. In an it...
Jaskirat Singh, Sachin S. Sapatnekar
SBCCI
2006
ACM
126views VLSI» more  SBCCI 2006»
15 years 3 months ago
Power constrained design optimization of analog circuits based on physical gm/ID characteristics
This paper presents a transistor optimization methodology for low-power analog integrated CMOS circuits, relying on the physics-based gm/ID characteristics as a design optimizatio...
Alessandro Girardi, Sergio Bampi
DATE
2006
IEEE
152views Hardware» more  DATE 2006»
15 years 4 months ago
Adaptive chip-package thermal analysis for synthesis and design
Ever-increasing integrated circuit (IC) power densities and peak temperatures threaten reliability, performance, and economical cooling. To address these challenges, thermal analy...
Yonghong Yang, Zhenyu (Peter) Gu, Changyun Zhu, Li...
DATE
2010
IEEE
118views Hardware» more  DATE 2010»
14 years 11 months ago
Proactive NBTI mitigation for busy functional units in out-of-order microprocessors
Due to fast technology scaling, negative bias temperature instability (NBTI) has become a major reliability concern in designing modern integrated circuits. In this paper, we prese...
Lin Li, Youtao Zhang, Jun Yang 0002, Jianhua Zhao
GI
2004
Springer
15 years 3 months ago
Towards a Framework and a Design Methodology for Autonomic Integrated Systems
: The transition from microelectronics to nanoelectronics reaches physical limits and results in a paradigm shift in the design and fabrication of electronic circuits. The conserva...
Andreas Herkersdorf, Wolfgang Rosenstiel