418 search results - page 59 / 84 » Fast Integrated Tools for Circuit Design with FPGAs |
DAC
2005
ACM
14 years 12 months ago
2005
ACM
Traditional corner analysis fails to guarantee a target yield for a given performance metric. However, recently proposed solutions, in the form of statistical timing analysis, whi...
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ISPD
2012
ACM
13 years 5 months ago
2012
ACM
We propose a new multilevel framework for large-scale placement called MAPLE that respects utilization constraints, handles movable macros and guides the transition between global...
DAC
1999
ACM
15 years 2 months ago
1999
ACM
This paper presents a novel approach for synthesis of analog systems from behavioral VHDL-AMS specifications. We implemented this approach in the VASE behavioral-synthesis tool. ...
DAC
2003
ACM
15 years 11 months ago
2003
ACM
As power consumption of the clock tree in modern VLSI designs tends to dominate, measures must be taken to keep it under control. This paper introduces an approach for reducing cl...
DATE
2003
IEEE
15 years 3 months ago
2003
IEEE
In this paper, a simulation-based synthesis tool, AMIGO, for analog cell sizing is presented. AMIGO is based upon genetic optimization techniques adapted to circuit sizing. A fram...