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DSD
2010
IEEE
161views Hardware» more  DSD 2010»
14 years 10 months ago
Design of Trace-Based Split Array Caches for Embedded Applications
—Since many embedded systems execute a predefined set of programs, tuning system components to application programs and data is the approach chosen by many design techniques to o...
Alice M. Tokarnia, Marina Tachibana
BMCBI
2010
84views more  BMCBI 2010»
14 years 10 months ago
A variational Bayes algorithm for fast and accurate multiple locus genome-wide association analysis
Background: The success achieved by genome-wide association (GWA) studies in the identification of candidate loci for complex diseases has been accompanied by an inability to expl...
Benjamin A. Logsdon, Gabriel E. Hoffman, Jason G. ...
VLSID
1999
IEEE
101views VLSI» more  VLSID 1999»
15 years 2 months ago
Formal System Design Based on the Synchrony Hypothesis, Functional Models and Skeletons
Formal approaches to HW and system design have not been generally adopted, because designers often view the modelling concepts in these approaches as unsuitable for their problems...
Ingo Sander, Axel Jantsch
CODES
2009
IEEE
15 years 4 months ago
Exploiting data-redundancy in reliability-aware networked embedded system design
This paper presents a system-level design methodology for networked embedded systems that exploits existing data-redundancy to increase their reliability. The presented approach n...
Martin Lukasiewycz, Michael Glaß, Jürge...
GLVLSI
2007
IEEE
140views VLSI» more  GLVLSI 2007»
15 years 4 months ago
Structured and tuned array generation (STAG) for high-performance random logic
Regularly structured design techniques can combat complexity on a variety of fronts. We present the Structured and Tuned Array Generation (STAG) design methodology, which provides...
Matthew M. Ziegler, Gary S. Ditlow, Stephen V. Kos...