— With power a major limiting factor in the design of scalable interconnected systems, power-aware networks will become inherent components of single-chip and multi-chip systems....
— The constant increase in levels of integration and the reduction of the time-to-market have led to the definition of new methodologies stressing reuse. This involves not only ...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi,...
ct We describe work on the visualization of bibliographic data and, to aid in this task, the application of numerical techniques for multidimensional scaling. Many areas of scienti...
In this paper, our memory architecture exploration methodology and CAD techniques for network protocol applications are presented. Prototype tools have been implemented, and appli...
Peter Slock, Sven Wuytack, Francky Catthoor, Gjalt...
This paper examines the road train concept as a new alternative in long-distance freight traffic. The design of such a system is a difficult task since many different and conflicti...