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» Fast Simulation Techniques for Design Space Exploration
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ICCAD
2001
IEEE
86views Hardware» more  ICCAD 2001»
15 years 6 months ago
System-Level Exploration for Pareto-Optimal Configurations in Parameterized Systems-on-a-Chip
In this work, we provide a technique for efficiently exploring the configuration space of a parameterized system-on-a-chip (SOC) architecture to find all Pareto-optimal configurat...
Tony Givargis, Frank Vahid, Jörg Henkel
ICRA
2003
IEEE
144views Robotics» more  ICRA 2003»
15 years 3 months ago
A vision-based haptic exploration
Real-world objects exhibit rich physical interaction behaviours on contact. Such behaviours depend on how heavy and hard it is when held, how its surface feels when touched, how i...
Hiromi T. Tanaka, Kiyotaka Kushihama, Naoki Ueda, ...
IISWC
2008
IEEE
15 years 4 months ago
Accelerating multi-core processor design space evaluation using automatic multi-threaded workload synthesis
The design and evaluation of microprocessor architectures is a difficult and time-consuming task. Although small, handcoded microbenchmarks can be used to accelerate performance e...
Clay Hughes, Tao Li
PRL
2002
128views more  PRL 2002»
14 years 9 months ago
Dynamic flies: a new pattern recognition tool applied to stereo sequence processing
The "fly algorithm" is a fast artificial evolution-based technique devised for the exploration of parameter space in pattern recognition applications. In the application...
Jean Louchet, Maud Guyon, Marie-Jeanne Lesot, Amin...
DAC
2000
ACM
15 years 10 months ago
Code compression for low power embedded system design
erse approaches at all levels of abstraction starting from the physical level up to the system level. Experience shows that a highlevel method may have a larger impact since the de...
Haris Lekatsas, Jörg Henkel, Wayne Wolf