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» Fast Summed-Area Table Generation and its Applications
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ARVLSI
1995
IEEE
78views VLSI» more  ARVLSI 1995»
13 years 10 months ago
A technique for high-speed, fine-resolution pattern generation and its CMOS implementation
This paper presents an architecture for generating a high-speed data pattern with precise edge placement resolution by using the matched delay technique. The technique involves ...
Gary C. Moyer, Mark Clements, Wentai Liu, Toby Sch...
ICPP
2003
IEEE
13 years 11 months ago
Hardware-Assisted Design for Fast Packet Forwarding in Parallel Routers
A hardware-assisted design, dubbed cache-oriented multistage structure (COMS), is proposed for fast packet forwarding. COMS incorporates small on-chip cache memory in its constitu...
Nian-Feng Tzeng
ISCA
1993
IEEE
137views Hardware» more  ISCA 1993»
13 years 10 months ago
Architectural Support for Translation Table Management in Large Address Space Machines
Virtual memoy page translation tables provide mappings from virtual to physical addresses. When the hardware controlled Tratmlation L.ookaside Buffers (TLBs) do not contain a tran...
Jerome C. Huck, Jim Hays
DOCENG
2004
ACM
13 years 10 months ago
A document-based approach to the generation of web applications
: XML is unique in its very broad acceptance throughout both the document engineering and data processing community. This creates a unique opportunity for unifying the traditionall...
Andrea R. de Andrade, Ethan V. Munson, Maria da Gr...
ER
2007
Springer
142views Database» more  ER 2007»
14 years 16 days ago
Automatic Hidden-Web Table Interpretation by Sibling Page Comparison
The longstanding problem of automatic table interpretation still illudes us. Its solution would not only be an aid to table processing applications such as large volume table conve...
Cui Tao, David W. Embley