Sciweavers

4 search results - page 1 / 1
» Fast bit permutation unit for media enhanced microprocessors
Sort
View
ISCAS
2006
IEEE
120views Hardware» more  ISCAS 2006»
15 years 3 months ago
Fast bit permutation unit for media enhanced microprocessors
— Bit and subword permutations are useful in many multimedia and cryptographic applications. New shift and permute instructions have been added to the instruction set of general-...
Giorgos Dimitrakopoulos, Christos Mavrokefalidis, ...
88
Voted
VLSISP
2008
173views more  VLSISP 2008»
14 years 9 months ago
Fast Bit Gather, Bit Scatter and Bit Permutation Instructions for Commodity Microprocessors
Advanced bit manipulation operations are not efficiently supported by commodity word-oriented microprocessors. Programming tricks are typically devised to shorten the long sequence...
Yedidya Hilewitz, Ruby B. Lee
ICCD
2001
IEEE
140views Hardware» more  ICCD 2001»
15 years 6 months ago
Cost-effective Hardware Acceleration of Multimedia Applications
General-purpose microprocessors augmented with SIMD execution units enhance multimedia applications by exploiting data level parallelism. However, supporting/overhead related inst...
Deependra Talla, Lizy Kurian John
ARITH
2001
IEEE
15 years 1 months ago
Computer Arithmetic-A Processor Architect's Perspective
The Instruction Set Architecture (ISA) of a programmable processor is the native languageof the machine. It defines the set of operations and resourcesthat are optimized for that ...
Ruby B. Lee