40 search results - page 4 / 8 » Fast exploration of bus-based on-chip communication architec... |
ASPDAC
2005
ACM
15 years 1 months ago
2005
ACM
— We present SoCExplore, a framework for fast communicationcentric design space exploration of complex SoCs with networkbased interconnects. Speed-up in exploration is achieved t...
114
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ERSA
2003
15 years 1 months ago
2003
In this paper we propose an original and fast design space exploration method targeting reconfigurable architectures. This method takes place during the first steps of a design fl...
104
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ASAP
2005
IEEE
15 years 5 months ago
2005
IEEE
As billion transistor System-on-chips (SoC) become commonplace and design complexity continues to increase, designers are faced with the daunting task of meeting escalating design...
104
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TECS
2008
14 years 11 months ago
2008
tion. Transaction Level Modeling (TLM) has been proposed to abstract communication for highspeed system simulation and rapid design space exploration. Although being widely accepte...
ICCAD
1999
IEEE
15 years 4 months ago
1999
IEEE
This paper addresses the problem of efficient and accurate performance analysis to drive the exploration and design of bus-based System-on-Chip (SOC) communication architectures. ...