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TVLSI
2008
176views more  TVLSI 2008»
14 years 11 months ago
A Fuzzy Optimization Approach for Variation Aware Power Minimization During Gate Sizing
Abstract--Technology scaling in the nanometer era has increased the transistor's susceptibility to process variations. The effects of such variations are having a huge impact ...
Venkataraman Mahalingam, N. Ranganathan, J. E. Har...
ISCA
2006
IEEE
125views Hardware» more  ISCA 2006»
15 years 5 months ago
Architectural Semantics for Practical Transactional Memory
Transactional Memory (TM) simplifies parallel programming by allowing for parallel execution of atomic tasks. Thus far, TM systems have focused on implementing transactional stat...
Austen McDonald, JaeWoong Chung, Brian D. Carlstro...
MICRO
2010
IEEE
156views Hardware» more  MICRO 2010»
14 years 10 months ago
Explicit Communication and Synchronization in SARC
SARC merges cache controller and network interface functions by relying on a single hardware primitive: each access checks the tag and the state of the addressed line for possible...
Manolis Katevenis, Vassilis Papaefstathiou, Stamat...
GECCO
2008
Springer
122views Optimization» more  GECCO 2008»
15 years 23 days ago
Evolving machine microprograms
The realization of a control unit can be done using a complex circuitry or microprogramming. The latter may be considered as an alternative method of implementation of machine ins...
Pedro A. Castillo Valdivieso, G. Fernández,...
BMCBI
2010
108views more  BMCBI 2010»
14 years 11 months ago
iGTP: A software package for large-scale gene tree parsimony analysis
Background: The ever-increasing wealth of genomic sequence information provides an unprecedented opportunity for large-scale phylogenetic analysis. However, species phylogeny infe...
Ruchi Chaudhary, Mukul S. Bansal, André Weh...