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HPCA
1997
IEEE
15 years 3 months ago
Datapath Design for a VLIW Video Signal Processor
This paper represents a design study of the datapath for a very long instruction word (VLIW) video signal processor (VSP). VLIW architectures provide high parallelism and excellen...
Andrew Wolfe, Jason Fritts, Santanu Dutta, Edil S....
PARELEC
2002
IEEE
15 years 4 months ago
Boosting the Performance of Electromagnetic Simulations on a PC-Cluster
One of the crucial aspects in the design process of high voltage apparatus is the precise simulation of the electrostatic and/or electromagnetic £eld distribution in three dimens...
Carsten Trinitis, Martin Schulz, Wolfgang Karl
69
Voted
VLSID
2005
IEEE
121views VLSI» more  VLSID 2005»
15 years 11 months ago
A Heuristic for Peak Power Constrained Design of Network-on-Chip (NoC) Based Multimode Systems
Designing NoC-based systems has become increasingly complex with support for multiple functionalities. Decisions regarding interconnections between the heterogeneous system compon...
Praveen Bhojwani, Rabi N. Mahapatra, Eun Jung Kim,...
GLVLSI
2003
IEEE
180views VLSI» more  GLVLSI 2003»
15 years 4 months ago
3D direct vertical interconnect microprocessors test vehicle
The current trends in high performance integrated circuits are towards faster and more powerful circuits in the giga-hertz range and even further. As the more complex Integrated C...
John Mayega, Okan Erdogan, Paul M. Belemjian, Kuan...
EURODAC
1994
IEEE
127views VHDL» more  EURODAC 1994»
15 years 3 months ago
Optimal equivalent circuits for interconnect delay calculations using moments
In performance-driven interconnect design, delay estimators are used to determine both the topology and the layout of good routing trees. We address the class of moment-matching, ...
Sudhakar Muddu, Andrew B. Kahng