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» Fast simulation of VLSI interconnects
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ICCAD
2002
IEEE
73views Hardware» more  ICCAD 2002»
15 years 8 months ago
Shaping interconnect for uniform current density
As the VLSI technology scaling down, the electromigration problem becomes one of the major concerns in high-performance IC design for both power network and signal interconnects. ...
Muzhou Shao, D. F. Wong, Youxin Gao, Li-Pen Yuan, ...
ICPP
2008
IEEE
15 years 5 months ago
TPTS: A Novel Framework for Very Fast Manycore Processor Architecture Simulation
The slow speed of conventional execution-driven architecture simulators is a serious impediment to obtaining desirable research productivity. This paper proposes and evaluates a f...
Sangyeun Cho, Socrates Demetriades, Shayne Evans, ...
GLVLSI
2003
IEEE
175views VLSI» more  GLVLSI 2003»
15 years 4 months ago
A custom FPGA for the simulation of gene regulatory networks
We present a unique FPGA that uses a mix of digital and large-signal analog computation for the simulation of gene regulatory networks. The prototype IC consists of a 4x5 array of...
Ilias Tagkopoulos, Charles A. Zukowski, German Cav...
FCCM
2007
IEEE
137views VLSI» more  FCCM 2007»
15 years 5 months ago
Rapid Prototyping of Large-scale Analog Circuits With Field Programmable Analog Array
— Modern advances in reconfigurable analog technologies are allowing field-programmable analog arrays (FPAAs) to dramatically grow in size, flexibility, and usefulness. This p...
I. Faik Baskaya, Brian Gestner, Christopher M. Twi...
104
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VLSID
2010
IEEE
202views VLSI» more  VLSID 2010»
14 years 9 months ago
Processor Architecture Design Using 3D Integration Technology
The emerging three-dimensional (3D) chip architectures, with their intrinsic capability of reducing the wire length, is one of the promising solutions to mitigate the interconnect...
Yuan Xie