160 search results - page 13 / 32 » Fast simulation of VLSI interconnects |
ISQED
2005
IEEE
15 years 4 months ago
2005
IEEE
This paper presents a two-step, RC-interconnect insensitive linear time-varying (LTV) driver model for gate-level timing calculation. We show how to characterize a driver with the...
ISCAPDCS
2004
15 years 21 days ago
2004
This paper shows that a novel network called the fat-stack is universally efficient when adequate capacity distribution is provided and is suitable for use as an interconnection n...
100
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DAC
2003
ACM
16 years 8 days ago
2003
ACM
Skin effect makes interconnect resistance and inductance frequency dependent. This paper addresses the problem of efficiently estimating the signal characteristics of any RLC netw...
104
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FCCM
2006
IEEE
15 years 3 months ago
2006
IEEE
With advances in reconfigurable hardware, especially field-programmable gate arrays (FPGAs), it has become possible to use reconfigurable hardware to accelerate complex applicatio...
100
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VLSI
2007
Springer
15 years 5 months ago
2007
Springer
Abstract—Analysis and verification environments for nextgeneration nano-scale RFIC designs must be able to cope with increasing design complexity and to account for new effects,...