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» Fast simulation of VLSI interconnects
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ICCAD
2004
IEEE
80views Hardware» more  ICCAD 2004»
15 years 8 months ago
HiSIM: hierarchical interconnect-centric circuit simulator
To ensure the power and signal integrity of modern VLSI circuits, it is crucial to analyze huge amount of nonlinear devices together with enormous interconnect and even substrate ...
Tsung-Hao Chen, Jeng-Liang Tsai, Tanay Karnik
GLVLSI
2003
IEEE
185views VLSI» more  GLVLSI 2003»
15 years 4 months ago
Noise tolerant low voltage XOR-XNOR for fast arithmetic
With scaling down to deep submicron and nanometer technologies, noise immunity is becoming a metric of the same importance as power, speed, and area. Smaller feature sizes, low vo...
Mohamed A. Elgamel, Sumeer Goel, Magdy A. Bayoumi
GLVLSI
2003
IEEE
129views VLSI» more  GLVLSI 2003»
15 years 4 months ago
A system-level methodology for fast multi-objective design space exploration
In this paper, we address the problem of the efficient exploration of the architectural design space for parameterized systems. Since the design space is multi-objective, our aim ...
Gianluca Palermo, Cristina Silvano, S. Valsecchi, ...
VLSI
2007
Springer
15 years 5 months ago
Fast estimation of software energy consumption using IPI(Inter-Prefetch Interval) energy model
In this paper, we present the way of fast and accurate estimation of software energy consumption in off-the-shelf processor using IPI(Inter-Prefetch Interval) energy model. In ou...
Jungsoo Kim, Kyungsu Kang, Heejun Shim, Woong Hwan...
GLVLSI
2006
IEEE
113views VLSI» more  GLVLSI 2006»
15 years 5 months ago
Statistical gate delay calculation with crosstalk alignment consideration
We study gate delay variation caused by crosstalk aggressor alignment, i.e., difference of signal arrival times in coupled neighboring interconnects. This effect is as significan...
Andrew B. Kahng, Bao Liu, Xu Xu