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ICS
1999
Tsinghua U.
15 years 3 months ago
Low-level router design and its impact on supercomputer system performance
Supercomputer performance is highly dependent on its interconnection subsystem design. In this paper we study how di erent architectural approaches for router design impact into s...
Valentin Puente, José A. Gregorio, Cruz Izu...
SBCCI
2003
ACM
135views VLSI» more  SBCCI 2003»
15 years 4 months ago
Modeling a Reconfigurable System for Computing the FFT in Place via Rewriting-Logic
The growing adoption of reconfigurable architectures opens new implementation alternatives and creates new design challenges. In the case of dynamically reconfigurable architectur...
Mauricio Ayala-Rincón, Rodrigo B. Nogueira,...
CF
2006
ACM
15 years 5 months ago
A nano-scale reconfigurable mesh with spin waves
In this paper, we present a nano-scale reconfigurable mesh that is interconnected with ferromagnetic spin-wave buses. The architecture described here, while requiring the same num...
Mary Mehrnoosh Eshaghian-Wilner, Alexander Khitun,...
DAC
2008
ACM
16 years 9 days ago
Transistor level gate modeling for accurate and fast timing, noise, and power analysis
Current source based cell models are becoming a necessity for accurate timing and noise analysis at 65nm and below. Voltage waveform shapes are increasingly more difficult to repr...
S. Raja, F. Varadi, Murat R. Becer, Joao Geada
ET
2007
89views more  ET 2007»
14 years 11 months ago
QCA Circuits for Robust Coplanar Crossing
In this paper, different circuits of Quantum-dot Cellular Automata (QCA) are proposed for the so-called coplanar crossing. Coplanar crossing is one of the most interesting feature...
Sanjukta Bhanja, Marco Ottavi, Fabrizio Lombardi, ...