160 search results - page 28 / 32 » Fast simulation of VLSI interconnects |
106
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TC
2010
14 years 9 months ago
2010
—Switched networks have been adopted in on-chip communication for their scalability and efficient resource sharing. However, using a general network for a specific domain may res...
VLSID
2006
IEEE
15 years 11 months ago
2006
IEEE
SoC design methodologies are under constant revision due to adoption of fast shrinking process technologies at nanometer levels. Nanometer process geometries exhibit new complex d...
100
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TCAD
2002
14 years 11 months ago
2002
Chemical-mechanical polishing (CMP) and other manufacturing steps in very deep submicron VLSI have varying effects on device and interconnect features, depending on local character...
VLSISP
2010
14 years 9 months ago
2010
A Split decoding algorithm is proposed which divides each row of the parity check matrix into two or multiple nearly-independent simplified partitions. The proposed method signific...
ICCAD
2003
IEEE
15 years 8 months ago
2003
IEEE
Current CMOS technologies are characterized by interconnect lines with increased relative resistance w.r.t. driver output resistance. Designs generate signal waveshapes that are v...