160 search results - page 30 / 32 » Fast simulation of VLSI interconnects |
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SAMOS
2004
Springer
15 years 4 months ago
2004
Springer
In recent years, power consumption has become a critical concern for many VLSI systems. Whereas several case studies demonstrate that technology-, layout-, and gate-level technique...
APCSAC
2006
IEEE
15 years 5 months ago
2006
IEEE
Abstract. Bypass delays are expected to grow beyond 1ns as technology scales. These delays necessitate pipelining of bypass paths at processor frequencies above 1GHz and thus affe...
IPPS
2000
IEEE
15 years 3 months ago
2000
IEEE
In this paper, we propose a novel hardware caching technique, called switch directory, to reduce the communication latency in CC-NUMA multiprocessors. The main idea is to implemen...
SIGCOMM
1996
ACM
15 years 3 months ago
1996
ACM
Wormhole routing LANs are emerging as an effective solution for high-bandwidth, low-latency interconnects in distributed computing and cluster computing applications. An important...
ASPDAC
2005
ACM
15 years 1 months ago
2005
ACM
Abstract— A disjoint support decomposition (DSD) is a representation of a Boolean function F obtained by composing two or more simpler component functions such that the component...