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ICCAD
2001
IEEE
113views Hardware» more  ICCAD 2001»
15 years 8 months ago
Compact Modeling and SPICE-Based Simulation for Electrothermal Analysis of Multilevel ULSI Interconnects
This paper presents both compact analytical models and fast SPICE based 3-D electro-thermal simulation methodology to characterize thermal effects due to Joule heating in high per...
TingYen Chiang, Kaustav Banerjee, Krishna Saraswat
ICCAD
2002
IEEE
113views Hardware» more  ICCAD 2002»
15 years 8 months ago
INDUCTWISE: inductance-wise interconnect simulator and extractor
Abstract—A robust, efficient, and accurate inductance extraction and simulation tool, INDUCTWISE, is developed and described in this paper. This work advances the state-of-the-ar...
Tsung-Hao Chen, Clement Luk, Hyungsuk Kim, Charlie...
ISCAS
2006
IEEE
124views Hardware» more  ISCAS 2006»
15 years 5 months ago
Noise Effects on Performance of Signal Detection in an Analog VLSI Resonate-And Fire Neuron
In this paper, we present analog VLSI implementation of a resonate-and-fire neuron (RFN) model, and then consider noise effects on its performance of signal detection. The RFN ci...
Kazuki Nakada, Jun Igarashi, A. Tetsuya, Hatsuo Ha...
DFT
1999
IEEE
119views VLSI» more  DFT 1999»
15 years 3 months ago
RAMSES: A Fast Memory Fault Simulator
In this paper, we present a memory fault simulator called the Random Access Memory Simulator for Error Screening (RAMSES). Although it was designed based on some wellknown memory ...
Chi-Feng Wu, Chih-Tsun Huang, Cheng-Wen Wu
FCCM
2000
IEEE
103views VLSI» more  FCCM 2000»
15 years 3 months ago
A Networked FPGA-Based Hardware Implementation of a Neural Network Application
This paper describes a networked FPGA-based implementation of the FAST (Flexible Adaptable-Size Topology) architecture, a Arti cial Neural Network (ANN) that dynamically adapts it...
Héctor Fabio Restrepo, Ralph Hoffmann, Andr...