160 search results - page 9 / 32 » Fast simulation of VLSI interconnects |
GLVLSI
2005
IEEE
15 years 4 months ago
2005
IEEE
This paper discusses interconnect capacitance extraction for system LCD circuits, where coupling capacitance is much significant since a ground plane locates far away unlike LSI ...
VLSID
1999
IEEE
15 years 3 months ago
1999
IEEE
Recently Lillis, et al. presented an elegant dynamic programming approach to RC interconnect delay optimization through driver sizing, repeater insertion, and, wire sizing which e...
105
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IJCNN
2007
IEEE
15 years 5 months ago
2007
IEEE
—The paper presents a silicon neuron circuit that mimics the behaviour of known classes of biological neurons. The circuit has been designed in a 0.35µm CMOS technology. The fir...
GLVLSI
2009
IEEE
15 years 6 months ago
2009
IEEE
Resource based optimization for high performance integrated circuits is presented. The methodology is applied to simultaneous shield and repeater insertion, resulting in minimum c...
VLSID
2002
IEEE
15 years 11 months ago
2002
IEEE
The improved T and improved n models are proposed for onchip interconnect macromodeling. Using global approximations, simple approximation frames are derived and applied to modeli...