13 search results - page 2 / 3 » Fast three-level logic minimization based on autosymmetry |
ICCAD
2003
IEEE
15 years 6 months ago
2003
IEEE
As current silicon-based techniques fast approach their practical limits, the investigation of nanoscale electronics, devices and system architectures becomes a central research p...
DAC
2005
ACM
14 years 11 months ago
2005
ACM
Finding all satisfying assignments of a propositional formula has many applications in the design of hardware and software. An approach to this problem augments a clause-recording...
DAC
2010
ACM
14 years 4 months ago
2010
ACM
This paper presents a logic restructuring technique named node addition and removal (NAR). It works by adding a node into a circuit to replace an existing node and then removing t...
FAST
2011
14 years 27 days ago
2011
: NAND flash-based solid-state drives (SSDs) are increasingly being deployed in storage systems at different levels such as buffer-caches and even secondary storage. However, the ...
CIIA
2009
14 years 10 months ago
2009
In this paper, we present a new synthesis feature namely, "Xor matching", and the foldback product term synthesis for Complex Programmable Logic Devices (CPLD) architectu...