53 search results - page 10 / 11 » FastRoute: a step to integrate global routing into placement |
DAC
2004
ACM
14 years 7 months ago
2004
ACM
Just-in-time (JIT) compilation has previously been used in many applications to enable standard software binaries to execute on different underlying processor architectures. Howev...
ISQED
2005
IEEE
13 years 12 months ago
2005
IEEE
Hierarchical approach greatly facilitates large-scale chip design by hiding distracting details in low-level objects. However, the lowlevel designs have to have a global view of h...
VLSID
1999
IEEE
13 years 10 months ago
1999
IEEE
Interconnect tuning and repeater insertion are necessary to optimize interconnectdelay, signalperformanceandintegrity, andinterconnectmanufacturability and reliability. Repeater i...
VLSID
2002
IEEE
13 years 11 months ago
2002
IEEE
We propose a timing-oriented logic optimization technique called Generalized De Morgan (GDM) transform, that integrates gate resizing, net buffering and De Morgan transformation. ...
DATE
1998
IEEE
13 years 10 months ago
1998
IEEE
Interconnect tuning is an increasingly critical degree of freedom in the physical design of high-performance VLSI systems. By interconnect tuning, we refer to the selection of lin...