Sciweavers

281 search results - page 49 / 57
» Fastpath Speculative Parallelization
Sort
View
HPCA
2000
IEEE
15 years 5 months ago
Improving the Throughput of Synchronization by Insertion of Delays
Efficiency of synchronization mechanisms can limit the parallel performance of many shared-memory applications. In addition, the ever increasing performance gap between processor...
Ravi Rajwar, Alain Kägi, James R. Goodman
ICCD
2006
IEEE
97views Hardware» more  ICCD 2006»
15 years 10 months ago
Pesticide: Using SMT Processors to Improve Performance of Pointer Bug Detection
Pointer bugs associated with dynamically-allocated objects resulting in out-of-bounds memory access are an important class of software bugs. Because such bugs cannot be detected e...
Jin-Yi Wang, Yen-Shiang Shue, T. N. Vijaykumar, Sa...
IEEEPACT
2000
IEEE
15 years 5 months ago
Dynamic Branch Prediction for a VLIW Processor
This paper describes the design of a dynamic branchpredictorfor a VLIW processor. The developed branch predictor predicts the direction of a branch, i.e., taken or not taken, and ...
Jan Hoogerbrugge
IEEEPACT
2007
IEEE
15 years 7 months ago
The OpenTM Transactional Application Programming Interface
Transactional Memory (TM) simplifies parallel programming by supporting atomic and isolated execution of user-identified tasks. To date, TM programming has required the use of l...
Woongki Baek, Chi Cao Minh, Martin Trautmann, Chri...
ICPPW
2009
IEEE
15 years 8 months ago
Hardware Microkernels for Heterogeneous Manycore Systems
Abstract— The migration away from power-hungry, speculative execution procesors towards manycore architectures is good news for the embedded and real-time systems community. Comm...
Jason Agron, David L. Andrews