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» Fault Tolerance in Decentralized Systems
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DSD
2004
IEEE
136views Hardware» more  DSD 2004»
15 years 1 months ago
FPGA Based Design of the Railway's Interlocking Equipments
This paper describes the architecture of a safety system of the railway's interlocking equipment, which has been developed for Czech railways. The system will be used for the...
Radek Dobias, Hana Kubatova
ASAP
2005
IEEE
165views Hardware» more  ASAP 2005»
15 years 3 months ago
CONAN - A Design Exploration Framework for Reliable Nano-Electronics
In this paper we introduce a design methodology that allows the system/circuit designer to build reliable systems out of unreliable nano-scale components. The central point of our...
Sorin Cotofana, Alexandre Schmid, Yusuf Leblebici,...
ISLPED
2009
ACM
132views Hardware» more  ISLPED 2009»
15 years 4 months ago
Enabling ultra low voltage system operation by tolerating on-chip cache failures
Extreme technology integration in the sub-micron regime comes with a rapid rise in heat dissipation and power density for modern processors. Dynamic voltage scaling is a widely us...
Amin Ansari, Shuguang Feng, Shantanu Gupta, Scott ...
CCGRID
2001
IEEE
15 years 1 months ago
Sabotage-Tolerance Mechanisms for Volunteer Computing Systems
In this paper, we address the new problem of protecting volunteer computing systems from malicious volunteers who submit erroneous results by presenting sabotagetolerance mechanis...
Luis F. G. Sarmenta
SEDE
2007
14 years 11 months ago
Case study: A tool centric approach for fault avoidance in microchip designs
— Achieving reliability in fault tolerant systems requires both avoidance and redundancy. This study focuses on avoidance as it pertains to the design of microchips. The lifecycl...
Clemente Izurieta