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» Fault Tolerance in Decentralized Systems
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DSD
2008
IEEE
79views Hardware» more  DSD 2008»
15 years 4 months ago
Digital Systems Architectures Based on On-line Checkers
In this paper, a methodology for generating VHDL descriptions of hardware checkers is presented. It is shown how the methodology can be used to generate on-line checkers of commun...
Martin Straka, Zdenek Kotásek, Jan Winter
FLAIRS
2006
14 years 11 months ago
Focusing Strategies for Multiple Fault Diagnosis
Diagnosing multiple faults for a complex system is often very difficult. It requires not only a model which adequately represents the diagnostic aspect of a complex system, but al...
Tsai-Ching Lu, K. Wojtek Przytula
EH
2005
IEEE
127views Hardware» more  EH 2005»
15 years 3 months ago
On the Robustness Achievable with Stochastic Development Processes
Manufacturing processes are a key source of faults in complex hardware systems. Minimizing this impact of manufacturing uncertainties is one way towards achieving fault tolerant s...
Shivakumar Viswanathan, Jordan B. Pollack
DATE
2005
IEEE
101views Hardware» more  DATE 2005»
15 years 3 months ago
Techniques for Fast Transient Fault Grading Based on Autonomous Emulation
Very deep submicron and nanometer technologies have increased notably integrated circuit (IC) sensitiveness to radiation. Soft errors are currently appearing into ICs working at e...
Celia López-Ongil, Mario García-Vald...
SOSP
2007
ACM
15 years 6 months ago
Attested append-only memory: making adversaries stick to their word
Researchers have made great strides in improving the fault tolerance of both centralized and replicated systems against arbitrary (Byzantine) faults. However, there are hard limit...
Byung-Gon Chun, Petros Maniatis, Scott Shenker, Jo...