32 search results - page 3 / 7 » Fault modeling and simulation for crosstalk in system-on-chi... |
ISCAS
2003
IEEE
13 years 11 months ago
2003
IEEE
High frequency digital LSIs usually consist of many subcircuits coupled with multi-conductor interconnects embedded in the substrate. They sometimes cause serious problems of the ...
DAC
2006
ACM
13 years 8 months ago
2006
ACM
With the growing complexity in consumer embedded products and the improvements in process technology, Multi-Processor SystemOn-Chip (MPSoC) architectures have become widespread. T...
DATE
2003
IEEE
13 years 11 months ago
2003
IEEE
Interconnects have deserved attention as a source of crosstalk to other interconnects, but have been ignored as a source of substrate noise. In this paper, we evaluate the importa...
IOLTS
2003
IEEE
13 years 11 months ago
2003
IEEE
On-chip global interconnections in very deep submicron technology (VDSM) ICs are becoming more sensitive and prone to errors caused by power supply noise, crosstalk noise, delay v...
CF
2004
ACM
13 years 11 months ago
2004
ACM
This paper presents a fault tolerant design technique for the clockless wave pipeline. The specific architectural model investigated in this paper is the two-phase clockless asyn...