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ET
2007
101views more  ET 2007»
14 years 11 months ago
Towards Nanoelectronics Processor Architectures
In this paper, we focus on reliability, one of the most fundamental and important challenges, in the nanoelectronics environment. For a processor architecture based on the unreliab...
Wenjing Rao, Alex Orailoglu, Ramesh Karri
ICCD
2005
IEEE
159views Hardware» more  ICCD 2005»
15 years 4 months ago
Architectural-Level Fault Tolerant Computation in Nanoelectronic Processors
Nanoelectronic devices are expected to have extremely high and variable fault rates; thus future processor architectures based on these unreliable devices need to be built with fa...
Wenjing Rao, Alex Orailoglu, Ramesh Karri
CLUSTER
2004
IEEE
15 years 2 months ago
Improved message logging versus improved coordinated checkpointing for fault tolerant MPI
Fault tolerance is a very important concern for critical high performance applications using the MPI library. Several protocols provide automatic and transparent fault detection a...
Pierre Lemarinier, Aurelien Bouteiller, Thomas H&e...
ISCAPDCS
2004
15 years 16 days ago
Adaptive-Subcube Fault Tolerant Routing in Dual-Cube with Very Large Number of Faulty Nodes
The dual-cube is a newly proposed interconnection network for linking a large amount of nodes with low node degree. It uses low-dimensional hypercubes as building blocks and keeps...
Yamin Li, Shietung Peng, Wanming Chu
EDCC
1999
Springer
15 years 3 months ago
A Fault Tolerant Clock Synchronization Algorithm for Systems with Low-Precision Oscillators
In this paper we present a new fault tolerant clock synchronization algorithm called the Fault Tolerant Daisy Chain algorithm. It is intended for internal clock synchronization of...
Henrik Lönn