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IJAHUC
2008
80views more  IJAHUC 2008»
15 years 1 months ago
Performance evaluation of node density-based adaptive routing scheme for disruption tolerant networks
: Traditional ad hoc routing protocols do not work in intermittently connected networks since end-to-end paths may not exist in such networks. Hence, routing mechanisms that can wi...
Mooi Choo Chuah, Peng Yang
GECCO
2006
Springer
137views Optimization» more  GECCO 2006»
15 years 5 months ago
Evolutionary design of fault-tolerant analog control for a piezoelectric pipe-crawling robot
In this paper, a genetic algorithm (GA) is used to design faulttolerant analog controllers for a piezoelectric micro-robot. Firstorder and second-order functions are developed to ...
Geoffrey A. Hollinger, David A. Gwaltney
FPGA
2010
ACM
191views FPGA» more  FPGA 2010»
15 years 8 months ago
Voter insertion algorithms for FPGA designs using triple modular redundancy
Triple Modular Redundancy (TMR) is a common reliability technique for mitigating single event upsets (SEUs) in FPGA designs operating in radiation environments. For FPGA systems t...
Jonathan M. Johnson, Michael J. Wirthlin
ISCAS
2007
IEEE
106views Hardware» more  ISCAS 2007»
15 years 8 months ago
Ensemble Dependent Matrix Methodology for Probabilistic-Based Fault-tolerant Nanoscale Circuit Design
—Two probabilistic-based models, namely the Ensemble-Dependent Matrix model [1][3] and the Markov Random Field model [2], have been proposed to deal with faults in nanoscale syst...
Huifei Rao, Jie Chen, Changhong Yu, Woon Tiong Ang...
CODES
2009
IEEE
15 years 8 months ago
Exploiting data-redundancy in reliability-aware networked embedded system design
This paper presents a system-level design methodology for networked embedded systems that exploits existing data-redundancy to increase their reliability. The presented approach n...
Martin Lukasiewycz, Michael Glaß, Jürge...