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» Fault tolerant mechanism design
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DFT
2003
IEEE
120views VLSI» more  DFT 2003»
15 years 5 months ago
Implementation and Testing of Fault-Tolerant Photodiode-Based Active Pixel Sensor (APS)
The implementation of imaging arrays for System-On-a-Chip (SOC) is aided by using faulttolerant light sensors. Fault-tolerant redundancy in an Active Pixel Sensor (APS) is obtaine...
Sunjaya Djaja, Glenn H. Chapman, Desmond Y. H. Che...
SASO
2007
IEEE
15 years 6 months ago
e-SAFE: An Extensible, Secure and Fault Tolerant Storage System
With the rapidly falling price of hardware, and increasingly available bandwidth, the storage technology is seeing a paradigm shift from centralized and managed mode to distribute...
Sandip Agarwala, Arnab Paul, Umakishore Ramachandr...
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ICDCS
2007
IEEE
15 years 6 months ago
Fault Tolerance in Multiprocessor Systems Via Application Cloning
Record and Replay (RR) is a software based state replication solution designed to support recording and subsequent replay of the execution of unmodified applications running on mu...
Philippe Bergheaud, Dinesh Subhraveti, Marc Vertes
DFT
2003
IEEE
117views VLSI» more  DFT 2003»
15 years 5 months ago
Fault Tolerant Design of Combinational and Sequential Logic Based on a Parity Check Code
We describe a method for designing fault tolerant circuits based on an extension of a Concurrent Error Detection (CED) technique. The proposed extension combines parity check code...
Sobeeh Almukhaizim, Yiorgos Makris
ICCD
2003
IEEE
143views Hardware» more  ICCD 2003»
15 years 8 months ago
Cost-Effective Graceful Degradation in Speculative Processor Subsystems: The Branch Prediction Case
We analyze the effect of errors in branch predictors, a representative example of speculative processor subsystems, to motivate the necessity for fault tolerance in such subsystem...
Sobeeh Almukhaizim, Thomas Verdel, Yiorgos Makris