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» Fault tolerant mechanism design
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CCGRID
2010
IEEE
15 years 28 days ago
Selective Recovery from Failures in a Task Parallel Programming Model
Abstract--We present a fault tolerant task pool execution environment that is capable of performing fine-grain selective restart using a lightweight, distributed task completion tr...
James Dinan, Arjun Singri, P. Sadayappan, Sriram K...
HPCA
2009
IEEE
16 years 11 days ago
Accurate microarchitecture-level fault modeling for studying hardware faults
Decreasing hardware reliability is expected to impede the exploitation of increasing integration projected by Moore's Law. There is much ongoing research on efficient fault t...
Man-Lap Li, Pradeep Ramachandran, Ulya R. Karpuzcu...
DAIS
2008
15 years 1 months ago
Towards Middleware for Fault-Tolerance in Distributed Real-Time and Embedded Systems
Distributed real-time and embedded (DRE) systems often require support for multiple simultaneous quality of service (QoS) properties, such as real-timeliness and fault tolerance, t...
Jaiganesh Balasubramanian, Aniruddha S. Gokhale, D...
AHS
2007
IEEE
262views Hardware» more  AHS 2007»
15 years 6 months ago
Addressing the Metric Challenge: Evolved versus Traditional Fault Tolerant Circuits
The field of Evolvable Hardware, applying artificial evolution to the design of digital and analogue hardware is around ten years old. However, the field is far from reaching m...
Pauline C. Haddow, Morten Hartmann, Asbjørn...
DAC
2004
ACM
15 years 3 months ago
On test generation for transition faults with minimized peak power dissipation
This paper presents a method of generating tests for transition faults using tests for stuck-at faults such that the peak power is the minimum possible using a given set of tests ...
Wei Li, Sudhakar M. Reddy, Irith Pomeranz