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» Fault tolerant mechanism design
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SEDE
2007
15 years 1 months ago
Case study: A tool centric approach for fault avoidance in microchip designs
— Achieving reliability in fault tolerant systems requires both avoidance and redundancy. This study focuses on avoidance as it pertains to the design of microchips. The lifecycl...
Clemente Izurieta
USENIX
2008
15 years 2 months ago
Diverse Replication for Single-Machine Byzantine-Fault Tolerance
New single-machine environments are emerging from abundant computation available through multiple cores and secure virtualization. In this paper, we describe the research challeng...
Byung-Gon Chun, Petros Maniatis, Scott Shenker
TC
2010
14 years 10 months ago
PERFECTORY: A Fault-Tolerant Directory Memory Architecture
—The number of CPUs in chip multiprocessors is growing at the Moore’s Law rate, due to continued technology advances. However, new technologies pose serious reliability challen...
Hyunjin Lee, Sangyeun Cho, Bruce R. Childers
ISORC
2002
IEEE
15 years 4 months ago
End-to-End Latency of a Fault-Tolerant CORBA Infrastructure
This paper presents measured probability density functions (pdfs) for the end-to-end latency of two-way remote method invocations from a CORBA client to a replicated CORBA server ...
Wenbing Zhao, Louise E. Moser, P. M. Melliar-Smith
DGO
2004
78views Education» more  DGO 2004»
15 years 1 months ago
Scalable and Secure Data Collection: Fault Tolerance Considerations
Data collection, or uploading, is an inherent part of numerous digital government applications. In this poster we present our recent research directions in the development of Bist...
William C. Cheng, Leslie Cheung, Cheng-Fu Chou, Le...