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» Fault tolerant mechanism design
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IPPS
1999
IEEE
15 years 4 months ago
Fully-Scalable Fault-Tolerant Simulations for BSP and CGM
In this paper we consider general simulations of algorithms designed for fully operational BSP and CGM machines on machines with faulty processors. The faults are deterministic (i...
Sung-Ryul Kim, Kunsoo Park
IPPS
1999
IEEE
15 years 4 months ago
Dependability Evaluation of Fault Tolerant Distributed Industrial Control Systems
Modern distributed industrial control systems need improvements in their dependability. In this paper we study the dependability of a fault tolerant distributed industrial control ...
José Carlos Campelo, Pedro Yuste, Francisco...
LCPC
2009
Springer
15 years 4 months ago
A Communication Framework for Fault-Tolerant Parallel Execution
PC grids represent massive computation capacity at a low cost, but are challenging to employ for parallel computing because of variable and unpredictable performance and availabili...
Nagarajan Kanna, Jaspal Subhlok, Edgar Gabriel, Es...
ARCS
2006
Springer
15 years 3 months ago
Fault-Tolerant Time-Triggered Ethernet Configuration with Star Topology
: We have shown in our past work that the standard configuration of Time-Triggered (TT) Ethernet unifies real-time and non-real-time traffic within a single coherent communication ...
Astrit Ademaj, Hermann Kopetz, Petr Grillinger, Kl...
ICCAD
2008
IEEE
161views Hardware» more  ICCAD 2008»
15 years 8 months ago
A low-overhead fault tolerance scheme for TSV-based 3D network on chip links
— Three-dimensional die stacking integration provides the ability to stack multiple layers of processed silicon with a large number of vertical interconnects. Through Silicon Via...
Igor Loi, Subhasish Mitra, Thomas H. Lee, Shinobu ...