936 search results - page 59 / 188 » Fault tolerant mechanism design |
BCS
2008
15 years 1 months ago
2008
Using formal verification for designing hardware designs free from logic design bugs has been an active area of research since the last 15 years. Technology has matured and we hav...
107
click to vote
ICRE
1998
IEEE
15 years 4 months ago
1998
IEEE
Model checking is shown to be an effective tool in validating the behavior of a fault tolerant embedded spacecraft controller. The case study presented here at by judiciously abst...
112
click to vote
IJON
2011
14 years 3 months ago
2011
We introduce a machine learning based classifier that identifies free radio channels for cognitive radio. The architecture is designed for nanoscale implementation, under nanosc...
NPC
2004
Springer
15 years 5 months ago
2004
Springer
Abstract. A fault tolerant parallel virtual file system is designed and implemented to provide high I/O performance and high reliability. A queuing model is used to analyze in deta...
105
click to vote
TON
2010
14 years 10 months ago
2010
—We consider the problem of deploying or repairing a sensor network to guarantee a specified level of multi-path connectivity (k-connectivity) between all nodes. Such a guarante...