Sciweavers

936 search results - page 82 / 188
» Fault tolerant mechanism design
Sort
View
MOBIHOC
2003
ACM
15 years 5 months ago
PAN: providing reliable storage in mobile ad hoc networks with probabilistic quorum systems
Reliable storage of data with concurrent read/write accesses (or query/update) is an ever recurring issue in distributed settings. In mobile ad hoc networks, the problem becomes e...
Jun Luo, Jean-Pierre Hubaux, Patrick Th. Eugster
DAC
2003
ACM
16 years 26 days ago
A survey of techniques for energy efficient on-chip communication
Interconnects have been shown to be a dominant source of energy consumption in modern day System-on-Chip (SoC) designs. With a large (and growing) number of electronic systems bei...
Vijay Raghunathan, Mani B. Srivastava, Rajesh K. G...
ICCD
2006
IEEE
94views Hardware» more  ICCD 2006»
15 years 8 months ago
Reliability Support for On-Chip Memories Using Networks-on-Chip
— As the geometries of the transistors reach the physical limits of operation, one of the main design challenges of Systems-on-Chips (SoCs) will be to provide dynamic (run-time) ...
Federico Angiolini, David Atienza, Srinivasan Mura...
RTS
2006
96views more  RTS 2006»
14 years 11 months ago
The TTA's Approach to Resilience after Transient Upsets
Abstract. The Time-Triggered Architecture, as architecture for safety-critical realtime applications, incorporates fault-tolerance mechanisms to ensure correct system operation des...
Wilfried Steiner, Michael Paulitsch, Hermann Kopet...
DAC
2003
ACM
15 years 5 months ago
Test generation for designs with multiple clocks
To improve the system performance, designs with multiple clocks have become more and more popular. In this paper, several novel test generation procedures are proposed to utilize ...
Xijiang Lin, Rob Thompson