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VTC
2007
IEEE
109views Communications» more  VTC 2007»
15 years 6 months ago
A Reliability-Aware LDPC Code Decoding Algorithm
— With the continuing downscaling of microelectronic technology, chip reliability becomes a great threat to the design of future complex microelectronic systems. Hence increasing...
Matthias Alles, Torben Brack, Norbert Wehn
TPHOL
1991
IEEE
15 years 3 months ago
First Steps Towards Automating Hardware Proofs in HOL
D ABSTRACT) Ramayya Kumar, Thomas Kropf, Klaus Schneider University of Karlsruhe,Institute of ComputerDesign and Fault Tolerance (Prof.Dr.D. Schmid) P.O. Box 6980, W-7500 Karlsruhe...
Ramayya Kumar, Thomas Kropf, Klaus Schneider
MICRO
2009
IEEE
178views Hardware» more  MICRO 2009»
15 years 6 months ago
Improving cache lifetime reliability at ultra-low voltages
Voltage scaling is one of the most effective mechanisms to reduce microprocessor power consumption. However, the increased severity of manufacturing-induced parameter variations a...
Zeshan Chishti, Alaa R. Alameldeen, Chris Wilkerso...
BIOSYSTEMS
2007
52views more  BIOSYSTEMS 2007»
15 years 18 hour ago
The genotypic complexity of evolved fault-tolerant and noise-robust circuits
Noise and component failure is an increasingly difficult problem in modern electronic design. Bioinspired techniques is one approach that is applied in an effort to solve such is...
Morten Hartmann, Pauline C. Haddow, Per Kristian L...
ISPA
2004
Springer
15 years 5 months ago
Highly Reliable Linux HPC Clusters: Self-Awareness Approach
Abstract. Current solutions for fault-tolerance in HPC systems focus on dealing with the result of a failure. However, most are unable to handle runtime system configuration change...
Chokchai Leangsuksun, Tong Liu, Yudan Liu, Stephen...