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HPCA
2006
IEEE
16 years 4 months ago
An approach for implementing efficient superscalar CISC processors
An integrated, hardware / software co-designed CISC processor is proposed and analyzed. The objectives are high performance and reduced complexity. Although the x86 ISA is targete...
Shiliang Hu, Ilhyun Kim, Mikko H. Lipasti, James E...
ICDCS
2009
IEEE
16 years 1 months ago
ISP Friend or Foe? Making P2P Live Streaming ISP-Aware
Abstract: Current peer-to-peer systems are network-agnostic, often generating large volumes of unnecessary inter-ISP traffic. Although recent work has shown the benefits of ISP-a...
Fabio Picconi, Laurent Massoulié
PODC
2009
ACM
15 years 11 months ago
Brief announcement: new bounds for the controller problem
The (M, W)-controller, originally studied by Afek, Awerbuch, Plotkin, and Saks, is a basic distributed tool that an abstraction for managing the consumption of a global resource i...
Yuval Emek, Amos Korman
IPPS
1999
IEEE
15 years 8 months ago
An Efficient Logging Algorithm for Incremental Replay of Message
To support incremental replay of message-passing applications, processes must periodically checkpoint and the content of some messages must be logged, to break dependencies of the...
Franco Zambonelli
IPPS
1998
IEEE
15 years 8 months ago
Resource Reservation for Adaptive QOS Mapping in Real-Time Mach
In this paper, we describe an adaptive QOS mapping scheme where the QOS parameters of applications are mapped into resource requirements dynamically, and the resources for the appl...
Tatsuo Nakajima