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HPCA
2005
IEEE
15 years 10 months ago
A Small, Fast and Low-Power Register File by Bit-Partitioning
A large multi-ported register file is indispensable for exploiting instruction level parallelism (ILP) in today's dynamically scheduled superscalar processors. The number of ...
Masaaki Kondo, Hiroshi Nakamura
IPPS
2008
IEEE
15 years 4 months ago
ContinuStreaming: Achieving high playback continuity of Gossip-based Peer-to-Peer streaming
Gossip-based Peer-to-Peer(P2P) streaming has been proved to be an effective and resilient method to stream qualified media contents in dynamic and heterogeneous network environme...
Zhenhua Li, Jiannong Cao, Guihai Chen
HPCA
2005
IEEE
15 years 3 months ago
Microarchitectural Wire Management for Performance and Power in Partitioned Architectures
Future high-performance billion-transistor processors are likely to employ partitioned architectures to achieve high clock speeds, high parallelism, low design complexity, and low...
Rajeev Balasubramonian, Naveen Muralimanohar, Kart...
IPPS
2005
IEEE
15 years 3 months ago
Configuration Steering for a Reconfigurable Superscalar Processor
An architecture for a reconfigurable superscalar processor is described in which some of its execution units are implemented in reconfigurable hardware. The overall configuration ...
Brian F. Veale, John K. Antonio, Monte P. Tull
EGC
2005
Springer
15 years 3 months ago
eNANOS Grid Resource Broker
Grid computing has been presented as a way to share geographically and organizationally distributed resources and to perform successfully distributed computation. For achieve this ...
Ivan Rodero, Julita Corbalán, Rosa M. Badia...