163 search results - page 23 / 33 » Features of Future Network Processor Architectures |
130
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SIGCOMM
2009
ACM
15 years 11 months ago
2009
ACM
This paper considers the requirements for a scalable, easily manageable, fault-tolerant, and efficient data center network fabric. Trends in multi-core processors, end-host virtua...
146
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ICS
2009
Tsinghua U.
15 years 9 months ago
2009
Tsinghua U.
Large Multi-Processor Systems-on-Chip use Networks-on-Chip with a high degree of reusability and scalability for message communication. Therefore, network infrastructure is a cruc...
143
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DFT
2003
IEEE
15 years 9 months ago
2003
IEEE
This paper discusses a hybrid optoelectronic scheme for a new interconnection network, "Tori connected mESHes (TESH)". The major features of TESH are the following: it i...
134
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MICRO
2009
IEEE
15 years 11 months ago
2009
IEEE
On-chip networks are critical to the scaling of future multicore processors. The challenge for on-chip network is to reduce the cost including power consumption and area while pro...
157
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IPPS
2005
IEEE
15 years 10 months ago
2005
IEEE
Processing-in-Memory (PIM) technology encompasses a range of research leveraging a tight coupling of memory and processing. The most unique features of the technology are extremel...