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ICRA
2007
IEEE
160views Robotics» more  ICRA 2007»
15 years 4 months ago
Morphing Bus: A rapid deployment computing architecture for high performance, resource-constrained robots
— For certain applications, field robotic systems require small size for cost, weight, access, stealth or other reasons. Small size results in constraints on critical resources s...
Colin D'Souza, Byung Hwa Kim, Richard M. Voyles
AUIC
2005
IEEE
15 years 3 months ago
Hand Tracking For Low Powered Mobile AR User Interfaces
Mobile augmented reality systems use general purpose computing hardware to perform tasks such as rendering computer graphics, providing video overlay, and performing vision tracki...
Ross Smith, Wayne Piekarski, Grant B. Wigley
CHES
2004
Springer
121views Cryptology» more  CHES 2004»
15 years 3 months ago
Power Analysis of an FPGA: Implementation of Rijndael: Is Pipelining a DPA Countermeasure?
Since their publication in 1998, power analysis attacks have attracted significant attention within the cryptographic community. So far, they have been successfully applied to di...
François-Xavier Standaert, Siddika Berna &O...
FPL
2003
Springer
119views Hardware» more  FPL 2003»
15 years 2 months ago
Hardware Implementations of Real-Time Reconfigurable WSAT Variants
Local search methods such as WSAT have proven to be successful for solving SAT problems. In this paper, we propose two host-FPGA (Field Programmable Gate Array) co-implementations,...
Roland H. C. Yap, Stella Z. Q. Wang, Martin Henz
DATE
2002
IEEE
206views Hardware» more  DATE 2002»
15 years 2 months ago
Accurate Area and Delay Estimators for FPGAs
We present an area and delay estimator in the context of a compiler that takes in high level signal and image processing applications described in MATLAB and performs automatic de...
Anshuman Nayak, Malay Haldar, Alok N. Choudhary, P...