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FPGA
1997
ACM
124views FPGA» more  FPGA 1997»
15 years 1 months ago
YARDS: FPGA/MPU Hybrid Architecture for Telecommunication Data Processing
This paper presents a novel system architecture applicable to high-performance and flexible transport data processing which includes complex protocol operation and a network contr...
Akihiro Tsutsui, Toshiaki Miyazaki
JMM2
2007
118views more  JMM2 2007»
14 years 9 months ago
FPGA-based Real-time Optical Flow Algorithm Design and Implementation
—Optical flow algorithms are difficult to apply to robotic vision applications in practice because of their extremely high computational and frame rate requirements. In most case...
Zhaoyi Wei, Dah-Jye Lee, Brent E. Nelson
ICRA
2010
IEEE
245views Robotics» more  ICRA 2010»
14 years 8 months ago
2000 fps real-time vision system with high-frame-rate video recording
—This paper introduces a high-speed vision system called IDP Express, which can execute real-time image processing and high frame rate video recording simultaneously. In IDP Expr...
Idaku Ishii, Tetsuro Tatebe, Qingyi Gu, Yuta Moriu...
ERSA
2010
217views Hardware» more  ERSA 2010»
14 years 7 months ago
FPGA for Computing the Pixel Purity Index Algorithm on Hyperspectral Images
The pixel purity index algorithm is employed in remote sensing for analyzing hyperspectral images. A single pixel usually covers several different materials, and its observed spect...
Carlos González, Daniel Mozos, Javier Resan...
DFT
2009
IEEE
178views VLSI» more  DFT 2009»
15 years 4 months ago
Soft Core Embedded Processor Based Built-In Self-Test of FPGAs
This paper presents the first implementation of Built-In Self-Test (BIST) of Field Programmable Gate Arrays (FPGAs) using a soft core embedded processor for reconfiguration of the...
Bradley F. Dutton, Charles E. Stroud