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FPL
2007
Springer
101views Hardware» more  FPL 2007»
15 years 3 months ago
Formal Modeling of Process Migration
This paper develops a formal model of process migration that describes programs, processes, and the migration of those processes within a migration realm. A migration realm is a g...
Aric D. Blumer, Henning S. Mortveit, Cameron D. Pa...
CEC
2005
IEEE
15 years 3 months ago
FPGA segmented channel routing using genetic algorithms
A genetic algorithm approach for segmented channel routing in field programmable gate arrays (FPGA's) is presented in this paper. The FPGA segmented channel routing problem (F...
Lipo Wang, Lei Zhou, Wen Liu
IPPS
2005
IEEE
15 years 3 months ago
Experiences with Soft-Core Processor Design
Soft-core processors exploit the flexibility of Field Programmable Gate Arrays (FPGAs) to allow a system designer to customize the processor to the needs of a target application....
Franjo Plavec, Blair Fort, Zvonko G. Vranesic, Ste...
FPL
2004
Springer
141views Hardware» more  FPL 2004»
15 years 3 months ago
Automatic Synthesis of Efficient Intrusion Detection Systems on FPGAs
—This paper presents a methodology and a tool for automatic synthesis of highly efficient intrusion detection systems using a high-level, graph-based partitioning methodology and...
Zachary K. Baker, Viktor K. Prasanna
ISVLSI
2003
IEEE
118views VLSI» more  ISVLSI 2003»
15 years 3 months ago
Reconfigurable Fast Memory Management System Design for Application Specific Processors
This paper presents the design and implementation of the new Active Memory Manager Unit (AMMU) designed to be embedded into System-on-Chip CPUs. The unit is implemented using VHDL...
S. Kagan Agun, J. Morris Chang