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FPL
2009
Springer
113views Hardware» more  FPL 2009»
15 years 2 months ago
Static versus scheduled interconnect in Coarse-Grained Reconfigurable Arrays
Spatially-tiled architectures, such as Coarse-Grained Reconfigurable Arrays (CGRAs), are powerful architectures for accelerating applications in the digital-signal processing, em...
Brian Van Essen, Aaron Wood, Allan Carroll, Stephe...
FPL
1998
Springer
121views Hardware» more  FPL 1998»
15 years 2 months ago
Reconfigurable PCI-Bus Interface (RPCI)
In this paper the Peripheral Component Interface PCI is presented as a target/master reconfigurable interface, based on Programmable Logic Devices PLDs (the Field Programmable Gate...
A. Abo Shosha, P. Reinhart, F. Rongen
IPPS
1999
IEEE
15 years 2 months ago
FPGA Implementation of Modular Exponentiation
An e cient implementations of the main building block in the RSA cryptographic scheme is achieved by mapping a bit-level systolic array for modular exponentiation onto Xilinx FPGAs...
Alexander Tiountchik, Elena Trichina
DCC
2004
IEEE
15 years 9 months ago
Reduced Complexity Wavelet-Based Predictive Coding of Hyperspectral Images for FPGA Implementation
We present an algorithm for lossy compression of hyperspectral images for implementation on field programmable gate arrays (FPGA). To greatly reduce the bit rate required to code ...
Agnieszka C. Miguel, Amanda R. Askew, Alexander Ch...
ICCD
2004
IEEE
97views Hardware» more  ICCD 2004»
15 years 6 months ago
A General Post-Processing Approach to Leakage Current Reduction in SRAM-Based FPGAs
A negative effect of ever-shrinking supply and threshold voltages is the larger percentage of total power consumption that comes from leakage current. Several techniques have been...
John Lach, Jason Brandon, Kevin Skadron