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ISCAS
2008
IEEE
118views Hardware» more  ISCAS 2008»
15 years 4 months ago
Algorithm for parallel inverse halftoning using partitioning of Look-Up Table (LUT)
— The Look-Up Table (LUT) method for inverse halftoning is fast and computation-free technique employed to obtain good quality images. In this work we propose a new algorithm to ...
Umair F. Siddiqi, Sadiq M. Sait
HICSS
2007
IEEE
112views Biometrics» more  HICSS 2007»
15 years 4 months ago
Hardware-Assisted Scanning for Signature Patterns in Image File Fragments
The ability to detect fragments of deleted image files and to reconstruct these image files from all available fragments on disk is an important activity in the field of digital f...
Yoginder S. Dandass
ISVLSI
2007
IEEE
116views VLSI» more  ISVLSI 2007»
15 years 4 months ago
Impact of Process Variations on Carbon Nanotube Bundle Interconnect for Future FPGA Architectures
As CMOS technology continues to scale, copper interconnect (CuI) will hinder the performance and reliability of Field Programmable Gate Arrays (FPGA) motivating the need for alter...
Soumya Eachempati, Narayanan Vijaykrishnan, Arthur...
AHS
2007
IEEE
231views Hardware» more  AHS 2007»
15 years 4 months ago
Debug Support for Hybrid SoCs
System-on-Chip devices containing both conventional and reconfigurable circuits are increasing in popularity. However the on-chip debug support infrastructure required to aid syst...
Andrew B. T. Hopkins, Klaus D. McDonald-Maier
CCECE
2006
IEEE
15 years 3 months ago
Towards the System-on-Chip Realization of a Sensorless Vector Controller with Microsecond-order Computation Time
— The aim of this research is to implement sensorless vector control algorithms on a single, eventually reconfigurable, chip, with a computation timing constraint of, at most, 1...
Rachid Beguenane, Jean-Gabriel Mailloux, Sté...