Sciweavers

531 search results - page 53 / 107
» Field-Programmable Gate Arrays
Sort
View
FPGA
2006
ACM
117views FPGA» more  FPGA 2006»
15 years 1 months ago
Context-free-grammar based token tagger in reconfigurable devices
In this paper, we present reconfigurable hardware architecture for detecting semantics of streaming data on 1+ Gbps networks. The design leverages on the characteristics of contex...
Young H. Cho, James Moscola, John W. Lockwood
FPGA
2006
ACM
111views FPGA» more  FPGA 2006»
15 years 1 months ago
FPGA clock network architecture: flexibility vs. area and power
This paper examines the tradeoffs between flexibility, area, and power dissipation of programmable clock networks for FieldProgrammable Gate Arrays (FPGA's). The paper begins...
Julien Lamoureux, Steven J. E. Wilton
FPL
2006
Springer
211views Hardware» more  FPL 2006»
15 years 1 months ago
Comparing FPGAs to Graphics Accelerators and the Playstation 2 Using a Unified Source Description
Field programmable gate arrays (FPGAs), graphics processing units (GPUs) and Sony's PlayStation 2 vector units offer scope for hardware acceleration of applications. We compa...
Lee W. Howes, Paul Price, Oskar Mencer, Olav Beckm...
FPGA
2000
ACM
175views FPGA» more  FPGA 2000»
15 years 1 months ago
An FPGA implementation and performance evaluation of the Serpent block cipher
With the expiration of the Data Encryption Standard (DES) in 1998, the Advanced Encryption Standard (AES) development process is well underway. It is hoped that the result of the ...
Adam J. Elbirt, Christof Paar
ARC
2008
Springer
175views Hardware» more  ARC 2008»
14 years 11 months ago
Multivariate Gaussian Random Number Generator Targeting Specific Resource Utilization in an FPGA
Abstract. Financial applications are one of many fields where a multivariate Gaussian random number generator plays a key role in performing computationally extensive simulations. ...
Chalermpol Saiprasert, Christos-Savvas Bouganis, G...