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531
search results - page 71 / 107
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Field-Programmable Gate Arrays
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IPPS
2006
IEEE
91
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Distributed And Parallel Com...
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Power consumption advantage of a dynamic optically reconfigurable gate array
15 years 3 months ago
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Minoru Watanabe, Fuminori Kobayashi
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ISPD
2003
ACM
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An architectural exploration of via patterned gate arrays
15 years 3 months ago
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www.ece.cmu.edu
Chetan Patel, Anthony Cozzie, Herman Schmit, Lawre...
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69
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IPPS
2002
IEEE
124
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On the Communication Capability of the Self-Reconfigurable Gate Array Architecture
15 years 2 months ago
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cs.nju.edu.cn
Hatem M. El-Boghdadi, Ramachandran Vaidyanathan, J...
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FPL
2001
Springer
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FPL 2001
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Gambit: A Tool for the Simultaneous Placement and Detailed Routing of Gate-Arrays
15 years 2 months ago
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www.cs.virginia.edu
In this paper we present a new method of integrating the placement and routing stages in the physical design of channel-based architectures, and present the first implementation o...
John Karro, James P. Cohoon
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87
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GLVLSI
1997
IEEE
143
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VLSI
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GLVLSI 1997
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Power Reduction in Large Fan-in CMOS Gates in Logic Arrays Using Selective Precharge
15 years 2 months ago
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www.cs.berkeley.edu
Shaoyi Wang
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