In this paper, we present a new retiming-based technology mapping algorithm for look-up table-based eld programmable gate arrays. The algorithm is based on a novel iterative proce...
: A new hardware structure for implementation of soft morphological filters is presented in this paper. This is based on the modification of the majority gate technique. A pipeline...
Antonios Gasteratos, Ioannis Andreadis, Phillipos ...
It is likely that it will become increasingly difficult to manufacture the complex, heterogeneous logic structures that characterise current reconfigurable logic systems. As a res...
This paper presents a compact analog neuron cell incorporating an array of charge-coupled synapses connected via a common output terminal. The novel silicon synapse is based on a t...
Yajie Chen, Steve Hall, Liam McDaid, Octavian Buiu...
— Wave pipelining offers a unique combination of high speed, low latency, and moderate power consumption. The construction of wave pipelines is benefited by the use of gates and...