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VLSISP
2010
102views more  VLSISP 2010»
14 years 8 months ago
A Low-overhead Scheduling Methodology for Fine-grained Acceleration of Signal Processing Systems
Fine-grained accelerators have the potential to deliver significant benefits in various platforms for embedded signal processing. Due to the moderate complexity of their targeted o...
Jani Boutellier, Shuvra S. Bhattacharyya, Olli Sil...
ASPDAC
2010
ACM
163views Hardware» more  ASPDAC 2010»
14 years 8 months ago
A PUF design for secure FPGA-based embedded systems
The concept of having an integrated circuit (IC) generate its own unique digital signature has broad application in areas such as embedded systems security, and IP/IC counterpiracy...
Jason Helge Anderson
TVLSI
2010
14 years 4 months ago
Area and Power Optimization of High-Order Gain Calibration in Digitally-Enhanced Pipelined ADCs
Digital calibration techniques are widely utilized to linearize pipelined analog-to-digital converters (ADCs). However, their power dissipation can be prohibitively high, particula...
Mohammad Taherzadeh-Sani, Anas A. Hamoui
ICDE
2011
IEEE
270views Database» more  ICDE 2011»
14 years 1 months ago
Real-time pattern matching with FPGAs
— We demonstrate a hardware implementation of a complex event processor, built on top of field-programmable gate arrays (FPGAs). Compared to CPU-based commodity systems, our sol...
Louis Woods, Jens Teubner, Gustavo Alonso
FPGA
2011
ACM
321views FPGA» more  FPGA 2011»
14 years 1 months ago
An analytical model relating FPGA architecture parameters to routability
We present an analytical model relating FPGA architectural parameters to the routability of the FPGA. The inputs to the model include the channel width and connection and switch b...
Joydip Das, Steven J. E. Wilton