There is a growing need for accurate power models at the system level. Memory structures such as caches, Branch Target Buffers (BTBs), and register files occupy significant area i...
Mahesh Mamidipaka, Kamal S. Khouri, Nikil D. Dutt,...
This paper presents a novel software engineering approach for developing a dynamic web interface that meets the quality criterion of “WYDIWYS” - What You Do Is What You See. T...
Jie Dai, Remo Mueller, Jacek Szymanski, Guo-Qiang ...
The paper first presents the integration options of what we call the Timing Description Language (TDL) with MathWorks' Simulink tools. Based on the paradigm of logical executi...
Many DSP and image processing embedded systems have hard memory constraints which makes it difficult to find a good task assignment and scheduling which fulfill these constrain...
To compare the outcomes of participatory and user-centered contextual design, case study methods and the Activity Checklist derived from Activity Theory are used to analyze two sy...