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145
Voted
DATE
2006
IEEE
91views Hardware» more  DATE 2006»
15 years 8 months ago
Efficient incremental clock latency scheduling for large circuits
The clock latency scheduling problem is usually solved on the sequential graph, also called register-to-register graph. In practice, the the extraction of the sequential graph for...
Christoph Albrecht
ER
2006
Springer
145views Database» more  ER 2006»
15 years 8 months ago
Combining Declarative and Procedural Knowledge to Automate and Represent Ontology Mapping
Ontologies on the Semantic Web are by nature decentralized. From the body of ontology mapping approaches, we can draw a conclusion that an effective approach to automate ontology m...
Li Xu, David W. Embley, Yihong Ding
146
Voted
FMCAD
2000
Springer
15 years 8 months ago
Monitor-Based Formal Specification of PCI
Bus protocols are hard to specify correctly, and yet it is often critical and highly beneficial that their specifications are correct, complete, and unambiguous. The informal speci...
Kanna Shimizu, David L. Dill, Alan J. Hu
139
Voted
ISHPC
2000
Springer
15 years 8 months ago
Limits of Task-Based Parallelism in Irregular Applications
Traditional parallel compilers do not effectively parallelize irregular applications because they contain little looplevel parallelism due to ambiguous memory references. We explo...
Barbara Kreaseck, Dean M. Tullsen, Brad Calder
131
Voted
QOFIS
2000
Springer
15 years 8 months ago
Mechanisms for Inter-domain QoS Routing in Differentiated Service Networks
In order to provide various services with different quality requirements, the current Internet is expected to turn into a QoS based Internet under the Differentiated Service (DiffS...
Peng Zhang, Raimo Kantola