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DFT
2009
IEEE
106views VLSI» more  DFT 2009»
15 years 4 months ago
Reducing Test Point Area for BIST through Greater Use of Functional Flip-Flops to Drive Control Points
Recently, a new test point insertion method for pseudo-random built-in self-test (BIST) was proposed in [Yang 09] which tries to use functional flip-flops to drive control test po...
Joon-Sung Yang, Benoit Nadeau-Dostie, Nur A. Touba
VTS
2005
IEEE
89views Hardware» more  VTS 2005»
15 years 3 months ago
Synthesis of Low Power CED Circuits Based on Parity Codes
An automated design procedure is described for synthesizing circuits with low power concurrent error detection. It is based on pre-synthesis selection of a parity-check code follo...
Shalini Ghosh, Sugato Basu, Nur A. Touba
ICAT
2003
IEEE
15 years 3 months ago
Civil Engineering Application for Virtual Collaborative Environment
The motivation for this project was to find a way to give engineers, and the community affected by Civil Engineering work, information that is often difficult to visualise via com...
Mauricio Capra, Marcio Aquino, Alan Dodson, Borian...
ISMVL
2003
IEEE
80views Hardware» more  ISMVL 2003»
15 years 3 months ago
Augmented Sifting of Multiple-Valued Decision Diagrams
Discrete functions are now commonly represented by binary (BDD) and multiple-valued (MDD) decision diagrams. Sifting is an effective heuristic technique which applies adjacent var...
D. Michael Miller, Rolf Drechsler
ADBIS
2003
Springer
114views Database» more  ADBIS 2003»
15 years 3 months ago
Compressing Large Signature Trees
In this paper we present a new compression scheme for signature tree structures. Beyond the reduction of storage space, compression attains significant savings in terms of query pr...
Maria Kontaki, Yannis Manolopoulos, Alexandros Nan...