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VTS
2005
IEEE
89views Hardware» more  VTS 2005»
15 years 5 months ago
Synthesis of Low Power CED Circuits Based on Parity Codes
An automated design procedure is described for synthesizing circuits with low power concurrent error detection. It is based on pre-synthesis selection of a parity-check code follo...
Shalini Ghosh, Sugato Basu, Nur A. Touba
DATE
2000
IEEE
75views Hardware» more  DATE 2000»
15 years 4 months ago
Layout Compaction for Yield Optimization via Critical Area Minimization
This paper presents a new compaction algorithm to improve the yield of IC layout. The yield is improved by reducing the area where the faults are more likely to happen known as cr...
Youcef Bourai, C.-J. Richard Shi
SCAI
2008
15 years 1 months ago
Troubleshooting when Action Costs are Dependent with Application to a Truck Engine
We propose a troubleshooting algorithm that can troubleshoot systems with dependent action costs. When actions are performed they may change the way the system is decomposed and af...
Håkan Warnquist, Mattias Nyberg, Petter S&au...
ESORICS
2010
Springer
15 years 28 days ago
k-Zero Day Safety: Measuring the Security Risk of Networks against Unknown Attacks
The security risk of a network against unknown zero day attacks has been considered as something unmeasurable since software flaws are less predictable than hardware faults and the...
Lingyu Wang, Sushil Jajodia, Anoop Singhal, Steven...
INFFUS
2002
108views more  INFFUS 2002»
14 years 11 months ago
Relationships between combination methods and measures of diversity in combining classifiers
This study looks at the relationships between different methods of classifier combination and different measures of diversity. We considered ten combination methods and ten measur...
Catherine A. Shipp, Ludmila Kuncheva